Dopefish escreveu: Durante grande parte da história dos computadores pessoais, o modelo predominante dos microprocessadores tem sido da Intel Corporation. O primeiro processador no IBM PC foi o Intel 8088. As gerações seguintes de processadores Intel foram da família 80X86 – 8086, 80286, 80386, 80486.A partir do 80586, a Intel entrou na justiça para patentear seu processador, pois os concorrentes AMD, Cyrix e Texas Instruments estavam ganhando terreno na disputa pelo processador de ponta. Depois do Pentium, a Intel já lançou o Pentium MMX, Pentium Celeron, Pentium Pró, Pentium III e Pentium IV, este último com clock de 1 GHz. Todos eram versões elaboradas do 8088 original, mas com desempenho melhorado de duas maneiras – operando mais rapidamente ou processando mais dados simultaneamente. O 8088, por exemplo, operava a 4,7 Mhz – ou 4,7 milhões de oscilações por segundo – e alguns chips como o Pentium IV de 1 GHz vão tão rápido quanto 133 MHz. O 8088 conseguia processar 8 bits de dados por vez, enquanto o Pentium IV processa 64 bits internamente.
Apesar das mudanças, os processadores Intel até o 80486 eram baseados em uma filosofia de projeto denominada CISC, do Inglês Complex Instruction Set Computing. O padrão CISC usa comandos que incorporam muitas instruções mínimas para executar uma simples operação. É como se ele fosse um facão que corta dados e códigos. Ou ainda, por comparação, como um bisturi que corta pedaços cada vez menores e mais delicados de dados e códigos. Esse bisturi é chamado RISC, do Inglês Reduced Instruction Set Computing. Projetos RISC são encontrados em processadores mais novos, entre eles o DEC Alpha, o RISC 6000 da IBM, o processador Power PC e, embora a Intel não chame os processadores Pentium de chips RISC, eles têm muito em comum com o padrão RISC de executar códigos.
O RISC é um projeto menos complicado que usa muitas instruções mais simples para executar uma operação comparável e em menos tempo que um processador CISC que executa um comando maior e mais complicado. Os chips RISC podem ser fisicamente menores que os chips CISC. E pelo fato de usarem menos transistores, geralmente sua fabricação é mais barata e produzem menos calor.
A primeira máquina RISC moderna foi o minicomputador 801 construído pela IBM, começando em 1975. Entretanto, a IBM não publicou nada a seu respeito até 1982. Em 1980, um grupo em Berkeley, liderado por David Patterson e Carlo Séquin, começou a projetar pastilhas RISC VLSI. Eles criaram o termo RISC e batizaram sua pastilha de CPU de RISC I, seguida de perto pela RISC II. Um pouco mais tarde, em 1981, do outro lado da baía de São Francisco, em Stanfor, John Hennessy projetou e fabricou uma pastilha RISC um pouco diferente, que ele chamou de MIPS.
Muitas previsões vêm afirmando que o futuro dos processadores caminha para um projeto RISC, e provavelmente elas estejam corretas. Mas não tem havido um movimento de venda em massa do RISC, por duas razões. A mais importante delas é manter a compatibilidade com o vasto número de softwares aplicativos, desenvolvido para trabalhar com os processadores Intel CISC mais antigos. A Segunda razão é que você não recebe todos os benefícios da arquitetura RISC, a não ser que esteja usando um sistema operacional e programas que tenham sido criados e compilados especificamente para tirar vantagens das operações RISC. Alguns fabricantes de computadores estão oferecendo processadores RISC para
Origins at Motorola
Motorola 6800 demonstration board built by Chuck Peddle and John Buchanan in 1974.
The 6502 was designed by many of the same engineers that had designed the Motorola 6800 microprocessor family.[1] Motorola started the microprocessor project in 1971 with Tom Bennett as the main architect. The chip layout began in late 1972, the first 6800 chips were fabricated in February 1974 and full family was officially released in November 1974.[2][3] Bill Mensch joined Motorola in June 1971 after graduating from the University of Arizona (at age 26).[4] His first assignment was helping define the peripheral ICs for the 6800 family and later he was the principal designer of the 6820 Peripheral Interface Adapter (PIA)[5] John Buchanan was the designer of the 6800 chip[6][7] and Rod Orgill, who later did the 6501, assisted Buchanan with circuit analyses and chip layout.[8] Motorola's engineers could run analog and digital simulations on an IBM 370-165 mainframe computer.[9] Bennett hired Chuck Peddle in 1973 to do architectural support work on the 6800 family products already in progress.[10] He contributed in many areas including the design of the 6850 ACIA (serial interface).[11]
Motorola's target customers were established electronics companies such as Hewlett-Packard, Tektronix, TRW and Chrysler.[12] In May of 1972 Motorola's engineers began visiting select customers and sharing the details of their proposed 8-bit microprocessor system with ROM, RAM, parallel and serial interfaces.[13] In early 1974 they provided engineering samples of the chips so customers could prototype their designs. Motorola's "total product family" strategy did not focus on the price of the microprocessor but on reducing the customer's total design cost. They offered development software on a timeshare computer, the "EXORciser" system debugging system, onsite training and field application engineer support.[14][15] Both Intel and Motorola had initially announced a $360 price for a single microprocessor.[16][17] (The IBM System/360 mainframe was a well known computer at the time.) The actual price for production quantities was much less. Motorola offered a design kit containing the 6800 with 6 support chips for $300.[18]
Peddle would accompany the sales people on customer visits and he found that customers were put off by the high cost of the microprocessor chips. To lower the price, the IC chip size would have to shrink so that more chips could be produced on each silicon wafer. This could be done by removing unessential features in the 6800 and using a newer fabrication technology, "depletion-mode" MOS transistors. Peddle and other team members started outlining the design of an improved feature, reduced size microprocessor. At that time Motorola's new semiconductor fabrication facility in Austin, Texas was having difficulty producing MOS chips and mid 1974 was the beginning of a year-long recession in the semiconductor industry. Also many of the Mesa, Arizona employees were displeased with the upcoming relocation to Austin, Texas.[19] Motorola Semiconductor Products Division's management was overwhelmed with problems and showed no interest in Peddle's low-cost microprocessor proposal. Chuck Peddle was frustrated with Motorola's management for missing this new opportunity. In a November 1975 interview, Motorola's Chairman, Robert Galvin, agreed. He said, "We did not choose the right leaders in the Semiconductor Products division." The division was reorganized and the management replaced. New group vice-president, John Welty said, "The semiconductor sales organization lost its sensitivity to customer needs and couldn't make speedy decisions."[20]
Peddle began looking for a source of funding for this new project and found a small semiconductor company in Pennsylvania. In August 1974, Chuck Peddle, Bill Mensch, Rod Orgill, Harry Bawcum, Ray Hirt, Terry Holdt and Wil Mathys left Motorola to join MOS Technology. (Mike James joined later.) Of the seventeen chip designers and layout people on the 6800 team, seven left. There were 30 to 40 other marketers, application engineers and system engineers on the 6800 team.[21] That December, Gary Daniels transferred into the 6800 microprocessor group. Tom Bennett did not want to leave the Phoenix area so Daniels took over the microprocessor development in Austin. His first project was a "depletion-mode" version of the 6800; this cut the chip area nearly in half and doubled the speed. The faster parts were available in July 1976.[22] This was followed by the 6802 which added 128 bytes of RAM and an on-chip clock oscillator circuit.[23]
Moving to MOS Technology
A 1973 MOS Technology advertisement highlighting their custom integrated circuit capabilities.
MOS Technology MCS6501
MOS Technology was formed in 1969 by three executives from General Instrument, Mort Jaffe, Don McLaughlin, and John Pavinen, to produce metal-oxide semiconductor (MOS) integrated circuits. Allen-Bradley, a supplier of electronic components and industrial controls, acquired a majority interest in 1970.[24] The company designed and fabricated custom ICs for customers and had developed a line of calculator chips.[25]
On August 19, 1974, the former Motorola employees moved into MOS Technology's headquarters at Valley Forge, Pennsylvania. The goal was to design and produce a low cost microprocessor for embedded applications and to target as wide as possible customer base. This would only be possible if the microprocessor was low cost – and in the semiconductor business, chip size determined cost. The size goal required n-channel "depletion-mode" MOS transistors, a more advanced process than MOS Technology's calculator chips used. John Pavinen was able to have the process ready by June 1975.[26] Chuck Peddle, Rod Orgill, and Wil Mathys designed the initial architecture of the new processors. There would be two microprocessors; the 6501 would plug into the same socket as the Motorola 6800 and the 6502 that would work with 6800 family peripherals and had on-chip clock oscillator. These processors would not run 6800 software because they used a different instruction set. A September 1975 article in EDN magazine gives this summary of the design.
The MOS Technology 650X family represents a conscious attempt of eight former Motorola employees who worked on the development of the 6800 system to put out a part that would replace and outperform the 6800, yet undersell it. With the benefit of hindsight gained on the 6800 project, the MOS Technology team headed by Chuck Peddle, made the following architectural changes in the Motorola CPU… [27]
The second "B" accumulator was omitted. The 16-bit 6800 index register was split into two 8-bit registers and these registers operate in the "true" indexing mode. Three-state control was eliminated from the address bus outputs. A clock generator was included on the chip. The address bus was always active so the VMA (valid-memory address) output was eliminated. An "8080-type" RDY signal for single-cycle stepping was added.
The chip high level design had to be turned into drawings of transistors and interconnects. At MOS Technology the "layout" was a very manual process done with color pencils and vellum paper. The layout consisted of thousands of polygon shapes on six different drawings; one for each layer of the semiconductor fabrication process. Rod Orgill was responsible for the 6501 design; he had assisted John Buchanan at Motorola on the 6800. Bill Mensch did the 6502; he was the designer of the 6820 Peripheral Interface Adapter (PIA) at Motorola. Harry Bawcom, Mike James and Sydney-Anne Holt helped with the layout.
The size goal for the 6502 chip was 153 x 168 mils (3.9 x 4.3 mm) or an area of 16.6 mm2.[27] At that time the technical literature would state the length and width of each chip in "mils" (0.001 inch). The original 6800 chips were 212 x 212 mils (5.4 x 5.4 mm) or an area 29.0 mm2.[28] A smaller area means more chips per silicon wafer and those smaller chip were less likely to encounter a defect during fabrication. The first layouts did not reach their target size. The first 6502 chips were 168 x 183 mils (4.3 x 4.7 mm) or an area of 19.8 mm2. The Rotate Right instruction (ROR) did not work in the first silicon but the next iteration of the design shrank the chip and fixed the Rotate Right instruction.[29]
Introducing the 6501 and 6502
Introductory advertisement for the MOS Technology MCS6501 and MCS6502 microprocessors.
MOS Technology's microprocessor introduction was quite different than the traditional months long product launch. The first run of a new IC is normally used for internal testing and shared with select customers as "engineering samples." These chips typically have a minor design defect or two that will be corrected before production begins. Chuck Peddle's goal was to sell the first run 6501 and 6502 chips to the attendees at the Wescon trade show in San Francisco beginning on September 16, 1975. Peddle was a very effective spokesman and the MOS Technology microprocessors were extensively covered in the trade press. One of the earliest was a full-page story on the MCS6501 and MCS6502 microprocessors in the July 24, 1975 issue of Electronics magazine.[30] Stories also ran in EE Times (August 24, 1975),[31] EDN (September 20, 1975), Electronic News (November 3, 1975), Byte (November 1975)[32] and Microcomputer Digest (November 1975).[33] Advertisements for the 6501 appeared in several publications the first week of August 1975. The 6501 would be for sale at Wescon for $25 each.[34] In September 1975 the advertisements included both the 6501 and the 6502 microprocessors. The 6502 would only cost $20.[35]
When MOS Technology arrived at Wescon, they found that exhibitors could not sell anything on the show floor. They rented the MacArthur Suite at the St. Francis Hotel and directed customers there to purchase the processors. At the suite the processors were stored in large jars to imply that the chips were in production and readily available. The customers did not know the bottom half of each jar contained non-functional chips.[36] The chips were $20 and $25 while the documentation package was an additional $10. Users were encouraged to make copies of the documents; an inexpensive way for MOS Technology to distribute product information. The processors were supposed to have 56 instructions but the Rotate Right (ROR) instruction did not work correctly on these chips so the preliminary data sheets just listed 55 instructions. The reviews in Byte and EDN noted the lack of the ROR instruction. The next revision of the layout fixed this problem and the May 1976 datasheet listed 56 instructions. Peddle wanted every interested engineer and hobbyist to have access to the chips and documentation. Other semiconductor companies only wanted to deal with serious customers. Signetics was introducing the 2650 microprocessor and advertisements asked readers to write for information on their company letterhead.[37]
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